The input stage of the low noise amplifier sets the limits on the sensitivity of the receiver. Therefore, low-noise is one of its most important design goals. Unfortunately, the lower intrinsic gain of transistors at higher frequencies makes it more difficult to achieve a low noise figure at very high frequencies. In such applications, additional noise sources such as gate-induced noise become more prominent with increasing frequency. The low noise amplifier also needs to achieve a sufficient gain to suppress the noise of the following stages and good linearity to handle out-of-band interference while providing a well-defined real impedance, which is normally 50-Ω.
In order to reduce the effect of noise at high frequency, a common-source stage with inductive degeneration has been used in CMOS low noise amplifier (“LNA”) implementations. It can be shown that for an input-matched common-source LNA, the minimum achievable noise factor, Fmin, and the effective transconductance, Gm, are linearly related to the working frequency, ω0, and its inverse, 1/ω0, respectively. Although this common-source topology is well suited for applications at operating frequencies in the low GHz range, its performance degrades substantially at higher frequencies when ω0 becomes comparable to ωT.
In contrast, in a common-gate (CG) LNA, the gate-source and gate-drain parasitic capacitances of the transistor are absorbed into the LC tank and resonated out at the operating frequency. Therefore, to the first order, the noise and gain performance of the common-gate stage is independent of the operating frequency, which is a desirable feature for high frequency design. However, due to the constraints of input matching, it can be shown that the noise factor of a common-gate LNA has a lower bound of 1+γ for perfect input match, where γ is the channel thermal noise coefficient. This represents a practical limit for noise reduction that restricts high-frequency applications.